UMCUserCodeIOPins

SwordfishUser.UMCUserCodeIOPins History

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August 21, 2011, at 12:46 PM by David Barker -
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August 21, 2011, at 12:46 PM by David Barker -
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[USERCODE]

; some device files don't define BAUDCON register (which is an alias for BAUDCTL)
#ifndef BAUDCON
  #define BAUDCON  BAUDCTL
#endif

;======================
; IO pin setup
;======================
; Setup usart pin directions and disable any analog pin functions
; Most devices have the usart on pins RC6 (TX) and RC7 (RX), although some devices
; label these TX1 and RX1.
; Usually the direction is done automatically when the usart is enabled and the TRIS
; bits should be set (=1), but on some parts you should explicitly set the TX as an output.
; A few devices have analog pin functions on the TX/RX pins and these MUST be disabled

; generic pin settings
;    bcf TRISC, TX       ; RC6/TX output (usually set by peripheral)
;    bsf TRISC, RX        ; RC7/RX input

; 18F1220/1320
#ifdef __18F1220
to:
 [USERCODE]

 ;======================
 ; IO pin setup
 ;======================
 ; Setup usart pin directions and disable any analog pin functions
 ; Most devices have the usart on pins RC6 (TX) and RC7 (RX), although some devices
 ; label these TX1 and RX1.
 ; Usually the direction is done automatically when the usart is enabled and the TRIS
 ; bits should be set (=1), but on some parts you should explicitly set the TX as an output.
 ; A few devices have analog pin functions on the TX/RX pins and these MUST be disabled

 ; generic pin settings
 ;    bcf TRISC, TX        ; RC6/TX output (usually set by peripheral)
 ;    bsf TRISC, RX      ; RC7/RX input

 ; 18F1220/1320
 #ifdef __18F1220
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#endif
#ifdef __18F1320
to:
 #endif
 #ifdef __18F1320
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#endif

; 18F1230/1330
; nothing really needed here... just pointing out uart is on PORTA
#ifdef __18F1230
to:
 #endif

 ; 18F1230/1330
 ; nothing really needed here... just pointing out uart is on PORTA
 #ifdef __18F1230
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#endif
#ifdef __18F1330
to:
 #endif
 #ifdef __18F1330
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#endif

; 18F13K22/14K22
#ifdef __18F13K22
to:
 #endif

 ; 18F13K22/14K22
 #ifdef __18F13K22
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#endif
#ifdef __18F14K22
to:
 #endif
 #ifdef __18F14K22
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#endif

; 18F2xK22/18F4xK22 family
; for theses devices, ANSELC is not part of the ACCESS bank
#ifdef __18F23K22
to:
 #endif

 ; 18F2xK22/18F4xK22 family
 ; for theses devices, ANSELC is not part of the ACCESS bank
 #ifdef __18F23K22
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#endif
#ifdef __18F24K22
to:
 #endif
 #ifdef __18F24K22
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#endif
#ifdef __18F25K22
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 #endif
 #ifdef __18F25K22
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#endif
#ifdef __18F26K22
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 #endif
 #ifdef __18F26K22
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#endif
#ifdef __18F43K22
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 #endif
 #ifdef __18F43K22
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#endif
#ifdef __18F44K22
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 #endif
 #ifdef __18F44K22
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#endif
#ifdef __18F45K22
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 #endif
 #ifdef __18F45K22
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#endif
#ifdef __18F46K22
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 #endif
 #ifdef __18F46K22
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#endif

; 18F13K50/14K50
#ifdef __18F13K50
to:
 #endif

 ; 18F13K50/14K50
 #ifdef __18F13K50
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#endif
#ifdef __18F14K50
to:
 #endif
 #ifdef __18F14K50
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#endif
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 #endif
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August 21, 2011, at 12:42 PM by David Barker -
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August 21, 2011, at 12:40 PM by David Barker -
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August 21, 2011, at 12:40 PM by David Barker -
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August 21, 2011, at 12:40 PM by David Barker -
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August 21, 2011, at 12:37 PM by David Barker -
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August 21, 2011, at 12:15 PM by David Barker -
Added lines 1-137:
[USERCODE]

; some device files don't define BAUDCON register (which is an alias for BAUDCTL)
#ifndef BAUDCON
  #define BAUDCON  BAUDCTL
#endif


;======================
; IO pin setup
;======================
; Setup usart pin directions and disable any analog pin functions
; Most devices have the usart on pins RC6 (TX) and RC7 (RX), although some devices
; label these TX1 and RX1.
; Usually the direction is done automatically when the usart is enabled and the TRIS
; bits should be set (=1), but on some parts you should explicitly set the TX as an output.
; A few devices have analog pin functions on the TX/RX pins and these MUST be disabled

; generic pin settings
;    bcf TRISC, TX        ; RC6/TX output (usually set by peripheral)
;    bsf TRISC, RX        ; RC7/RX input

; 18F1220/1320
#ifdef __18F1220
    bsf ADCON1, PCFG5  ; make uart pins digital
    bsf ADCON1, PCFG6
    bsf TRISB, TX      ; RB1/AN5/TX
    bsf TRISB, RX      ; RB4/AN6/RX
#endif
#ifdef __18F1320
    bsf ADCON1, PCFG5  ; make uart pins digital
    bsf ADCON1, PCFG6
    bsf TRISB, TX      ; RB1/AN5/TX
    bsf TRISB, RX      ; RB4/AN6/RX
#endif

; 18F1230/1330
; nothing really needed here... just pointing out uart is on PORTA
#ifdef __18F1230
    bsf TRISA, TX      ; RA2/TX
    bsf TRISA, RX      ; RA3/RX
#endif
#ifdef __18F1330
    bsf TRISA, TX      ; RA2/TX
    bsf TRISA, RX      ; RA3/RX
#endif

; 18F13K22/14K22
#ifdef __18F13K22
    bcf ANSELH, ANSEL11 ; make uart pins digital
    bsf TRISB, TX      ; RB7/TX
    bsf TRISB, RX      ; RB5/AN11/RX
#endif
#ifdef __18F14K22
    bcf ANSELH, ANSEL11 ; make uart pins digital
    bsf TRISB, TX      ; RB7/TX
    bsf TRISB, RX      ; RB5/AN11/RX
#endif

; 18F2xK22/18F4xK22 family
; for theses devices, ANSELC is not part of the ACCESS bank
#ifdef __18F23K22
    banksel ANSELC
    bcf ANSELC, ANSC7    ; make uart pins digital
    bcf ANSELC, ANSC6    ; make uart pins digital
    banksel 0
    bsf TRISC, TX        ; RC6/TX output
    bsf TRISC, RX        ; RC7/RX input
#endif
#ifdef __18F24K22
    banksel ANSELC
    bcf ANSELC, ANSC7    ; make uart pins digital
    bcf ANSELC, ANSC6    ; make uart pins digital
    banksel 0
    bsf TRISC, TX        ; RC6/TX output
    bsf TRISC, RX        ; RC7/RX input
#endif
#ifdef __18F25K22
    banksel ANSELC
    bcf ANSELC, ANSC7    ; make uart pins digital
    bcf ANSELC, ANSC6    ; make uart pins digital
    banksel 0
    bsf TRISC, TX        ; RC6/TX output
    bsf TRISC, RX        ; RC7/RX input
#endif
#ifdef __18F26K22
    banksel ANSELC
    bcf ANSELC, ANSC7    ; make uart pins digital
    bcf ANSELC, ANSC6    ; make uart pins digital
    banksel 0
    bsf TRISC, TX        ; RC6/TX output
    bsf TRISC, RX        ; RC7/RX input
#endif
#ifdef __18F43K22
    banksel ANSELC
    bcf ANSELC, ANSC7    ; make uart pins digital
    bcf ANSELC, ANSC6    ; make uart pins digital
    banksel 0
    bsf TRISC, TX        ; RC6/TX output
    bsf TRISC, RX        ; RC7/RX input
#endif
#ifdef __18F44K22
    banksel ANSELC
    bcf ANSELC, ANSC7    ; make uart pins digital
    bcf ANSELC, ANSC6    ; make uart pins digital
    banksel 0
    bsf TRISC, TX        ; RC6/TX output
    bsf TRISC, RX        ; RC7/RX input
#endif
#ifdef __18F45K22
    banksel ANSELC
    bcf ANSELC, ANSC7    ; make uart pins digital
    bcf ANSELC, ANSC6    ; make uart pins digital
    banksel 0
    bsf TRISC, TX        ; RC6/TX output
    bsf TRISC, RX        ; RC7/RX input
#endif
#ifdef __18F46K22
    banksel ANSELC
    bcf ANSELC, ANSC7    ; make uart pins digital
    bcf ANSELC, ANSC6    ; make uart pins digital
    banksel 0
    bsf TRISC, TX        ; RC6/TX output
    bsf TRISC, RX        ; RC7/RX input
#endif

; 18F13K50/14K50
#ifdef __18F13K50
    bcf ANSELH, ANS11  ; make uart pins digital
    bsf TRISB, TX      ; RB7/TX
    bsf TRISB, RX      ; RB5/AN11/RX
#endif
#ifdef __18F14K50
    bcf ANSELH, ANS11  ; make uart pins digital
    bsf TRISB, TX      ; RB7/TX
    bsf TRISB, RX      ; RB5/AN11/RX
#endif
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