Problem with delays when using HSPLL

CharlieM · Post by **CharlieM** » Thu Mar 24, 2011 11:19 pm

Hello Everyone,

Working on a project using a 18F8722 and I have a 10 mhz osc. If I declare the clock = 10 and enable hspll my delays are way off. I tested this my flashing a led. I turned it on for 50 ms and off for 50 ms. shoud'nt it flash at the same rate regardless of how fast the pic is running?

CharlieM · Post by **CharlieM** » Thu Mar 24, 2011 11:21 pm

I have it sorted. Thanks.

octal · Post by **octal** » Fri Mar 25, 2011 6:28 am

when you enable the HSPLL you got a x4 freq, you need to define the clock as a 40MHz (not 10 Mhz). SF calculate the delays taking into account the true core frequency, not the external crystal value.

CharlieM · Post by **CharlieM** » Fri Mar 25, 2011 9:51 am

Hi Octal thanks. that is what I did and all is working fine.

Jon Chandler · Post by **Jon Chandler** » Fri Mar 25, 2011 12:42 pm

I think people get confused with the CLOCK statement. It doesn't CONTROL anything. It simply INFORMS the software how fast it's running and the software uses it to calculate all the time-related values.