Digital inputs @ >Vdd of the PIC.
Posted: Sun Jan 31, 2010 2:54 pm
I need a bit of advice concerning PIC K series Input on PortB.
Digital not analogue.
I realise that (with a few exceptions) an input port.pin voltage >Vdd can be handled by a healthy value resistor 'protecting' the i/o because the clamp diodes will limit the input (to a degree as specced in Data Sheet).
e.g. 10V ---[47k]---- I/Opin(PIC@3v3) should be safe.
But I was wondering; if you have enabled the weak pull-ups will the excess voltage at input pop them?
In theory the current will be small and the voltage accross the weak pullup element will be basically the Vf of the diode - but I don't know the actual guts. Are they particularly sensitive?
Obv I can get around any potential issues with a few extra passives, but I'm hoping to keep my component count down.
Digital not analogue.
I realise that (with a few exceptions) an input port.pin voltage >Vdd can be handled by a healthy value resistor 'protecting' the i/o because the clamp diodes will limit the input (to a degree as specced in Data Sheet).
e.g. 10V ---[47k]---- I/Opin(PIC@3v3) should be safe.
But I was wondering; if you have enabled the weak pull-ups will the excess voltage at input pop them?
In theory the current will be small and the voltage accross the weak pullup element will be basically the Vf of the diode - but I don't know the actual guts. Are they particularly sensitive?
Obv I can get around any potential issues with a few extra passives, but I'm hoping to keep my component count down.
